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ZL1505
output current will be limited to 50% of the full rated output
capability. Using HSEL and LSEL, the ZL1505 can be used across
a wide range of applications using only a simple PCB layout
change.
Also, the VDD pin is the gate drive bias supply for the external
MOSFETs. VDD can be used to vary the gate drive strength as
shown for the low-side driver in Figures 9 through 12 and for the
high-side driver in Figures 17 through 20.
Overlap Protection Circuit
The ZL1505 includes an internal watchdog circuit that prevents
excessive shoot-through current from occurring in the unlikely
event that the PWM converter places both switches in the ON
position. If the overlap time between the PWMH and PWML
pulses exceeds 30ns, the PWMH signal will be forced to the LOW
state until the overlap condition ceases, allowing normal
switching operation to continue.
11
Start-up Requirements
During power-up, the ZL1505 maintains both GH and GL outputs
in the LOW state while the V IN voltage is ramping up. Once the
V DD supply is within specification, the GH and GL pins may be
operated using the PWMH and PWML logic inputs respectively.
In the case where the PWM controller is powered from a supply
other than the ZL1505’s V DD supply, and the PWM controller is
powered up first, the PWM controller gate outputs should be kept
in low or in high-impedance state until the V DD supply is within
specification. Additionally, if the ZL1505 begins its power-down
sequence prior to the PWM controller then the PWM controller
gate outputs should be set in low or in high-impedance state
before the V DD voltage supply drops below its specified range.
Thermal Protection
When the junction temperature exceeds +150°C the high-side
driver output GH is forced to logic low state. The driver output is
allowed to switch logic states again once the junction
temperature drops below +134°C.
FN6845.3
February 25, 2011
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